The disclosure relates to systems and methods for providing information for diagnosing internal fault conditions of finite state machines.
Unless otherwise indicated herein, the approaches described in this section are not admitted to be prior art by inclusion in this section.
Electronic devices, such as power management devices, often include multiple finite states machines (FSM) for power up, autonomous charging, or other functions based on input supplies and digital command signals. These finite state machines require a valid input clock and proper digital command signals to be present in order to sequence through the intended states to reach a fully powered up state. If any of these clocks or digital command signals are not valid due to rare events within a system environment, the device can become stuck in a fixed state and require a hard reset to recover or battery removal to recover.
Once a power management device, such as a power management integrated circuit (PMIC), is locked into a non-powered up state, there is very limited visibility into the internal state of the device for root cause analysis of any power up issues. Power up issues can often be very rare and intermittent. This can make it very difficult to reproduce the problem, diagnose the root cause, and provide alternative hardware or software solutions to fix the issue. Due to the issues described above, there is a need for an improved diagnostics interface to the PMIC device that allows visibility into internal infrastructure signals during fault conditions.